01
Embedded Engineering, From First Principles
MCU vs MPU · ARM Cortex-M0/M4/M7/M33 · Xtensa LX7 · RISC-V · AVR · toolchains · hosted vs freestanding C · reading reference manuals.
Lab 01
Toolchain bring-up + semihosting “hello”
Twenty-four weeks of production-grade embedded engineering. From a blank linker script on a Cortex-M to a signed, OTA-updatable fleet talking MQTT-over-TLS, with a TinyML classifier at the edge and a logic analyzer on the bench proving every byte. Open-source-first. Free, forever.
§ I · The Program
Crunch Wire is the embedded systems and IoT engineering specialization of the Code Crunch academy — a redesign of the original C7 course, reauthored in 2026 for the Crunch Labs tier. It is built for engineers who want to ship connected products: not Arduino-hobbyist sketches, but firmware that boots from a custom linker script, talks MQTT-over-TLS, survives OTA mid-power-loss, and runs a TinyML classifier in 200 KB of flash.
You write firmware in C, modern C++20, Rust (embassy, embedded-hal), and MicroPython. You boot FreeRTOS and Zephyr. You design and order a small KiCad board. You debug with GDB, OpenOCD, SWO/ITM, and a Saleae logic analyzer. By Week 24 you have built a fleet, signed its firmware, rotated its certificates, survived its first chaos drill, and written the on-call runbook a future maintainer can read at three in the morning.
"This is not a hobbyist Arduino course. It is the curriculum we wish existed when we first shipped a connected product."— Crunch Wire, course README
§ II · Who It's For
Wire is opinionated about its audience. C1 (Code Crunch Convos) is the floor — you should be able to read a C function and a datasheet without panic.
Writes firmware today against vendor SDKs. Wants the layers below — linker scripts, ISR latency, RTOS internals — and the layers above — OTA, attestation.
Finished C1. Targets hardware-heavy companies (Apple Silicon, Tesla, SpaceX, Anduril, Nest). Needs C fluency, hardware intuition, and a portfolio that proves both.
Has a product. Needs to ship a fleet, not a prototype. Needs firmware lifecycle, OTA, attestation, compliance, and the manufacturing handoff.
Reverse-engineers firmware. Now wants to build it: bootloader chains, signing infrastructure, secure elements, TLS on a 256 KB MCU.
§ III · Four Phases
The arc of the program is composed in four phases — six weeks each — each building on the last like floors of a building.
C and C++20 discipline. Datasheets and reference manuals. Toolchains, linker scripts, startup files, vector tables. Bare-metal blink without a single line of vendor HAL.
The peripheral menagerie — GPIO, UART, SPI, I2C, CAN, USB, ADC, DMA, timers. FreeRTOS and Zephyr in earnest. Debugging with GDB, OpenOCD, SWO/ITM, and a Saleae logic analyzer.
Wireless: BLE 5, Wi-Fi, LoRaWAN, Thread, Matter. MQTT, MQTT-SN, CoAP. Edge inference with TFLite-Micro. Fleet shadows, provisioning, telemetry pipelines.
Dual-bank bootloaders. Secure boot, code signing, delta-encoded OTA. TLS on a constrained MCU. Embedded Linux with Yocto and Buildroot. Capstone, chaos drill, on-call runbook.
§ IV · The Curriculum
Each entry corresponds to a folder in the GitHub repository with lecture notes, exercises, challenges, a quiz, homework, and a mini-project. Detailed acceptance criteria live in the syllabus.
MCU vs MPU · ARM Cortex-M0/M4/M7/M33 · Xtensa LX7 · RISC-V · AVR · toolchains · hosted vs freestanding C · reading reference manuals.
Toolchain bring-up + semihosting “hello”
Storage classes · volatile · bitfields · packed structs · fixed-width integers · UB on small targets · MISRA-C-aligned style.
SPSC ring buffer with host tests
Memory map · .text/.data/.bss/.stack · vector table · reset handler · what arm-none-eabi-ld actually does.
Blink without HAL — your own linker + startup
C++20 on freestanding · constexpr, concepts, std::span · no RTTI, no exceptions · CRTP peripheral drivers · ETL.
CRTP Gpio<Port,Pin> template
embedded-hal · embassy async executor · defmt · when Rust beats C, when it does not.
UART echo in embassy on the RP2040
MicroPython on the ESP32-S3 and RP2040 · when scripting earns its keep · scope basics · logic analyzer basics.
First scope shot — measure your blink
Tasks, queues, semaphores, mutexes · priority inversion · stack sizing · the idle hook.
Two-task producer/consumer with queues
Device tree · west · the build system · Zephyr drivers · power management.
Port your Lab 03 blink to Zephyr
Wire protocols · driver patterns · polled vs interrupt vs DMA · arbitration on I2C.
BME280 driver over I2C with DMA
CAN as a bus discipline · USB-CDC for log-everywhere · ADC sampling · PWM for motor control · DMA-driven sample buffers.
CAN echo node + USB-CDC log
IMU calibration · ToF basics · environmental sensor fusion · brushed DC motors · hobby servo control · fault handling.
IMU + ToF sensor hub publishing over UART
GDB over J-Link · OpenOCD · SWO/ITM tracing · Saleae captures · scope shots · runbooks that survive 3 AM.
Diagnose a priority inversion with SWO + scope
GAP, GATT, advertising, connection, security · Nordic softdevice · NimBLE on Zephyr · BLE-Mesh basics.
BLE occupancy beacon (custom GATT service)
ESP-IDF Wi-Fi state machine · MQTT v3.1.1 vs v5 · QoS · last-will · retained messages · MQTT-SN.
ESP32 sensor node publishing to Mosquitto
LoRaWAN classes A/B/C · The Things Network · duty cycles · over-the-air activation.
LoRaWAN soil-moisture node, OTAA-joined
802.15.4 · Thread mesh · OpenThread · Matter clusters · commissioning via QR code.
Matter-commissionable smart-plug node
TFLite-Micro · model quantization · MAC budgets · on-device inference under 200 KB.
Wake-word classifier on the nRF52840
Open fleet brokers · device shadows · telemetry schemas · provisioning at scale.
3-node fleet streaming to a Mosquitto + InfluxDB stack
MCUboot · dual-bank vs swap · image signing · rollback · trust anchors in ROM.
MCUboot dual-bank install on the STM32F446
Delta updates · resumable downloads · A/B rollback · the manifest signing chain.
Power-pull chaos test against your OTA flow
mbedTLS / wolfSSL on MCU · ATECC608 / OPTIGA Trust M · device attestation · cert rotation.
mTLS to the fleet broker with a secure element
Yocto · Buildroot · device tree · BSP · kernel modules (intro) · u-boot.
Custom Yocto image for a Raspberry Pi CM4
FCC Part 15, CE RED briefing · battery design · low-power modes · two-layer KiCad board.
KiCad layout review of your sensor node
Capstone polish · chaos drill (battery depletion / network partition / cert rotation) · postmortem · on-call runbook · interview prep.
Fleet-scale IoT gateway + edge-ML sensor node
§ V · The Toolchain
Every primary tool below is open-source. Vendor SDKs (STM32Cube, ESP-IDF, Nordic Connect) are taught as the production scale path — never as the only path.
§ VI · Skills You Will Carry
By the end of Week 24, you are able to do each of the following — credibly, on a real bench, in front of a real reviewer.
embassy and the embedded-hal ecosystem.§ VII · The Capstone
Week 24 is reserved for a single substantial system — the kind a real product team would scope across a quarter. Architecture diagram, live deploy, video walkthrough, chaos-drill postmortem.
Capstone Brief
Build a three-tier system: an ESP32-S3 sensor node running a TFLite-Micro classifier, a Linux gateway (Raspberry Pi CM4 with a custom Yocto image) aggregating telemetry, and a Mosquitto + InfluxDB + Grafana cloud back-end receiving signed MQTT-over-TLS traffic. All three tiers come from your code.
§ VIII · Getting Started
The setup is intentionally lightweight. If you have a Linux laptop and can run a terminal command, you can begin Week 1 today. The hardware kit ships separately.
# 1. Clone the curriculum repository git clone https://github.com/CODE-CRUNCH-WORLDWIDE/C7-WIRE-CRUNCH-EMBEDDED-SYSTEMS.git cd C7-WIRE-CRUNCH-EMBEDDED-SYSTEMS # 2. Install the toolchain (Linux / macOS / WSL2) sudo apt install gcc-arm-none-eabi gdb-multiarch openocd # Debian / Ubuntu brew install arm-none-eabi-gcc openocd # macOS # 3. Open Week 1 README and begin $EDITOR curriculum/week-01-foundations/README.md
Need the hardware kit list, or a budget alternative? See the README.
§ IX · Frequently Asked
Not for Weeks 1–2. Toolchain setup, C discipline, and ring-buffer host-tests can be done on any laptop. From Week 3 onward you need at least the STM32 Nucleo-F446 board and an ST-Link or J-Link debugger. Full kit is ~$240 with open-source alternatives listed in the syllabus.
Yes. GPL-3.0, like everything in Code Crunch. The only thing it costs you is time, effort, and the hardware kit.
Because firmware that ships requires depth you cannot fake. Bare-metal alone is 6 weeks. RTOS is 6 more. Wireless and edge ML are another 6. And production — bootloaders, OTA, secure boot, Linux/Yocto, capstone — is the last 6. See the charter for the full rationale.
Take C1 (Code Crunch Convos) first. We assume Python fluency and a willingness to read a C function. If you cannot yet read a C function, also do the C primer in C14 (Linux) before starting.
C7 owns the single device, the firmware, and the IoT fleet. C24 owns multi-actuator autonomous systems with ROS2, motion planning, and SLAM. Take C7 first if you want to ship a connected product; take C24 first if you want to build a robot. Many engineers do both.
Yes — for senior firmware roles. The course closes with a discipline-specific interview prep pack: system-design with hardware constraints, embedded-C code-review drills, RTOS internals questions, and the production runbook as a portfolio artifact.
§ X · Begin
Open the repository. Read Week 1. The bench is yours.